When writing data to non-volatile storage devices, the smallest unit of data that can be written by the host is governed by logical block addressing and is typically 512 bytes or 4 kilobytes. In contrast, the smallest unit of data that can be written to flash memory governed by a page size and is typically 16 kilobytes or 32 kilobytes. Thus, if a host device writes 4 kilobytes of data to a non-volatile storage device with flash memory with a 32 kilobyte page size, there is a 28 kilobyte difference in minimum write granularity.
One mechanism for dealing with the difference in minimum write granularity is to pad writes from the host that are smaller than the minimum flash write granularity with padding (typically zeros) and write the data and the padding to the flash memory. Performing such padding is undesirable as it wastes storage space in the flash memory and also increases wear on flash memory cells.
In light of the disadvantages associated with padding each write, aggregation of data to be written to flash memory has been performed using dynamic random access memory (DRAM) on the storage device, which is sometimes referred to as coupled DRAM. In such a scenario, when a host device writes data to the non-volatile storage device, and the amount of data from individual write commands is less than the page size of the flash memory, data from multiple write commands is aggregated in DRAM on the non-volatile storage device until a page size of data is received. When a page size of data is aggregated, the data is transferred from the DRAM on the non-volatile storage device to the flash memory. One problem with this implementation is that it requires additional DRAM on the non-volatile storage device. If such DRAM is a limited resource or is not available, such aggregation on the non-volatile storage device cannot be performed.